Location: San Jose, CA
Pay Rate: $80-$110
Contract Duration: 6 month contract
Physical Design Static Timing Analysis / STA Engineer
Responsibilities:
- Sr. STA Engineer with15+ years’ experience for STA position
- Perform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise analysis, and fixes timing & noise violations at full chip/block level for SoCs.
- Strong understanding of digital design concepts, including synthesis, timing analysis, and formal verification.
- Expert in Synopsys timing analysis tool Primetime.
- Experience in timing ecos using Synopsys and other tools.
- Familiarity with scripting languages like TCL, Perl, or Python for automation tasks.
- Knowledge of ASIC design flow, including front-end and back-end processes.
Requirements:
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
- Ability to collaborate effectively in a team environment and communicate complex technical concepts clearly.
- Strong problem-solving skills and attention to detail.
- Understanding of semiconductor fabrication processes and how they influence IC design.
- Experience with low-power design techniques is a plus.
- Knowledge of analog and mixed-signal design principles is beneficial for certain roles.
- Willingness to stay updated on the latest advancements in semiconductor technology and design methodologies.
We encourage Minorities, Women, Protected Veterans and Disabled individuals to apply for all positions that they may be qualified for. We maintain a drug-free workplace and perform pre-employment substance abuse testing and background checks
If you are interested in this position, please submit your resume in a Word Document with the month and year that you have worked at each previous position to - Veronika@norlandgroup.com and copy: 371639-Physical Design STA Engineer to the email Subject Line.
Job Posted Date: 5/10/2024
Job Type: Contract
Pay: $80.00 - $110.00 per hour