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Job Description:
Job Description
Work with Business Units chip design team & Analog / Digital IP / Phy owners (e.g. 112/224G PAM4 SerDes, LPDDR, etc.) for latest silicon nodes on chip floorplan & bump patterns design and optimization for package design requirements (e.g. substrate/package structure, BGA pattern development, s-parameter understanding and optimization [RL, NEXT/FEXT, IL etc.], and power integrity [PI] requirements)
Work with marketing and IC design teams to select the optimum package solution on cost, performance, manufacturability, and reliability
Work with IC design, system design, package SI/PI & thermal engineering teams to design custom packages using Cadence APD
Ensure designed packages meet SI/PI, thermal and mechanical requirements
Define, develop & select package BOM with OSAT partners
Manage IC packaging activity from concept through development, qualification, and high volume manufacturing
Create package design documentation and assembly instructions
Interface with packaging assembly and substrate suppliers for new product bring-up, qualification and production ramp
Interface with other operations functional groups such as product engineering, foundry, test, and QA
Interface with tier #1 external customers as needed to support, quality and/or other issue resolution
Support NPI bring-up, package reliability, multi-sourcing for manufacturing flexibility and sustain support in production
Work close with QA to resolve quality issues
Job Requirements
Education: Electrical Engineer or Mechanical Engineer
Experience : Bachelor's + 8 years, or Master's + 6 years, or PhD + 3 years of related experience
Deep understanding of SI/PI concepts such as characteristic impedance, s-parameters (RL, IL, FEXT/NEXT etc.), etc.
Strong authority on Cadence APD for custom substrate design
Hands-on expertise of advanced and new assembly processes for flipchip, wirebond, and MCM packages
Good understanding of materials as related to Chip Packaging Interaction (CPI)
Familiarity with wafer BEOL as related to CPI (top metal, AP, passivation, UBM, bumping etc.)
Knowledge of advanced substrate manufacturing/process
In depth knowledge of failure analysis techniques on advanced node silicon products
Conceptual knowledge of package cost structure
Project management, communication, and leadership skills
Knowledge of GD&T and be able to read/comprehend mechanical drawings
Good understanding of manufacturing and quality engineering fundamentals (DOE, process capability indices, etc.)
Job requirements are broad; the candidate must be able to expand and grow in multiple disciplines (manufacturing/quality, materials, electrical, thermal, and mechanical)
Additional Job Description:
Compensation and Benefits
The annual base salary range for this position is $106,800 - $178,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
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